Computer Chess Club Archives


Search

Terms

Messages

Subject: Re: Introducing "No-Moore's Law"

Author: Robert Hyatt

Date: 20:35:54 02/28/03

Go up one level in this thread


On February 28, 2003 at 18:13:30, Tom Kerrigan wrote:

>On February 27, 2003 at 18:09:47, Robert Hyatt wrote:
>
>>Sorry, but it _is_ true.  Yes, parts are marked "down" when there is a demand,
>>but
>>ask an engineer that works for one of these companies.  They don't design
>>something
>>and hope it will run fast.  They know _before they start_ how fast it is going
>>to clock
>>within a small error margin.
>
>How do you figure? If I estimate that a chip will run at 2GHz based on average
>gate and wire delays for my target process, and I get some chips that run at
>1GHz and some that run at 3GHz (not unusual), was I correct with a small error
>margin?
>
>-Tom


If you get _many_ that run at 3ghz you were rotten in your engineering.  If you
get many that only run at 1ghz, the process has a problem..

I don't know of _any_ fab lines that anyone claims has that 3:1 best to worst
case timing variance.

2.4, 2.8 and 3.0 I might buy.  Not 1.0 2.0 and 3.0

If you get one that occasionally runs at 3.0ghz, the engineers are going to be
all over it, because it shows that the fab line is capable of producing more
consistent chips than it is actually producing.  They'd find out why, and
before long it would be producing the 3.0ghz parts as originally planned.



This page took 0 seconds to execute

Last modified: Thu, 15 Apr 21 08:11:13 -0700

Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.