Author: Keith Evans
Date: 19:19:14 09/19/02
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On September 19, 2002 at 21:01:37, Ian Osgood wrote: >> I'm still trying to keep memory usage small >> in the hope to port this someday to the F25 >> asynchronous Forth multiprocessor >> [2 ps per instruction, 25 CPUs per die]. ) > >Actually, the chip is called the 25x, and has 0.3ns per instruction, 1ns memory >access, 2400 MIPS peak. > >Ian 1 ns memory access to what memory? A very small on-chip memory? What performance will you get to off-chip memory? How much off-chip memory is supported? What types of off-chip memory are supported? Also how deep are the stacks on the 25x? What happens when you fill them up? (As far as I know there are no plans to actually build the 25x.) Keith
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