Author: Vincent Diepeveen
Date: 04:13:14 07/16/03
Go up one level in this thread
On July 15, 2003 at 20:06:36, Robert Hyatt wrote: >On July 15, 2003 at 17:14:45, Gerd Isenberg wrote: > >>On July 15, 2003 at 09:33:39, Robert Hyatt wrote: >> >>>On July 15, 2003 at 06:24:58, Vincent Diepeveen wrote: >>> >>>>On July 14, 2003 at 16:07:27, Robert Hyatt wrote: >>>> >>>>You measure the latency with those benches of sequential reads. >>> >>>No. lm-bench does _random_ reads and computes the _random-access_ >>>latency. >>> >>>Don't know why you have a problem grasping that. >>> >>> >>>>So already opened cache lines you can get data faster from than >>>>random reads to memory. >>> >>>That also makes no sense. Perhaps you mean "already opened memory >>>rows"? >>> >>> >>>> >>>>Random reads to memory are about 280 ns at single cpu P4 and about 400ns at dual >>>>P4s. >>> >>>No they aren't. >>> >> >>Bob, i found nothing wrong with Vincent's code. He does N-random hashreads and >>aggregates the time used. I thought about some factor 2 error - but found no one >>so far. Random Hashreads, like chess programs do. >> >>1e9 random hash reads take 265 seconds (including ~60 seconds overhead) on my >>athlon-pc, however latency is defined. Any explanation? Any systematical error >>or assumption? What does lm-bench do, to measure latency? >> >>Regards, >>Gerd > > >It is possible to cause _other_ problems. IE you can push the instructions >in the loop out of cache, for one thing. There are others. The best numbers >I have seen come from lm-bench. It was not a quick and dirty program, it has >a lot of research behind it to address specific issues that were pointed out >over a period of a year. > >It is very easy to use a "low impedence probe" if you know what that means. It >actually affects the circuit it is measuring. > >200+ns seems way high to me, when the chip latency is less than 1/3 of that. > >again, I'd run lm-bench on your box to see what it says, then you have to >reconcile the differences. Bob, i just want a yes or a no: Do you recognize that already opened cache lines to the RAM you can read faster than non-opened cache lines at the ram? that is my only question. Best regards, Vincent
This page took 0 seconds to execute
Last modified: Thu, 15 Apr 21 08:11:13 -0700
Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.